The manufacture of a semiconductor device routinely entails a sequence of processes in each of which a substrate is exposed to a partially ionized gaseous medium in order to effect deposition of material onto the substrate or removal of material therefrom. Such a plasma process is defined by an ensemble of macroscopic input parameters--including, for example, power, temperature, pressure, inlet gas composition, substrate material, duration of exposure--very one of which affects the resulting profile on the substrate. Traditionally, a suite of values of these input parameters suitable for creating a given set of device features has been determined by trial and error. Development of a single process by this empirical approach is costly and time-consuming, requiring treatment of several patterned wafers and subsequent study of the resulting profiles by scanning electron microscopy. Because of the unpredictable way a small change in one input parameter may affect the profile, any modification of the layout--for example in device dimension, pattern density on the wafer, change in total open area--from one application to another has often necessitated redevelopment of the process, with the attendant outlay of resources.
Recent advances in device fabrication technology are rendering this approach even more onerous. Decreasing feature sizes demand tighter tolerances on feature dimensions and morphologies, so that the number of trials required to optimize a given process is increasing. The acceleration of wafer diameter growth and the complete redesign of the process involved with an incremental change in diameter have increased the number of times this empirical process must be repeated. The increasing use of devices tailor-made to a specific application also increases the amount of development and optimization activity required.
An alternative, computational approach would derive input parameters from a complete physical description of a plasma process including a plasma model for describing the coupling between the macroscopic input parameters and the macroscopic fluxes, concentrations and energy distributions of the various species in the plasma; and a profile simulator for atomistically determining from the macroscopic fluxes the resulting etch or deposition rate along the wafer surface and calculating the profile evolution therefrom. Ideally, such a physical description of plasma etching and deposition processes would enable the ab initio selection of the macroscopic input parameters appropriate for generating a desired profile on the substrate, eliminating the need for expensive and time-consuming test sequences.
Research in this field has done much to elucidate mechanisms at work in plasma processes, and thus has contributed scaling laws that could frame a physical description. However, notwithstanding the availability of computational means sufficiently powerful to perform the necessary calculations based on known scaling laws, the implementation of such an ab initio approach has been limited by lack of data. For example, the manner in which the values of some coefficients in these laws depend on the particulars of a given process has been unknown as yet. In past investigations, determination of the value of such a scaling coefficient consistent with a plasma process defined by a given set of input parameters has typically been done by comparing a finished profile, created by applying that process, with a simulated profile including one or more of these coefficients as adjustable parameters. Such hindsight evaluation may promote understanding a given coefficient's role in a scaling law, but it has not afforded the ability to predict profile evolution for any process defined by a set of input parameters differing from the set used in the experimental process used to derive the value of that coefficient.